lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <1681089.qGWOhLKTTo@avalon>
Date:	Thu, 25 Jul 2013 15:22:29 +0200
From:	Laurent Pinchart <laurent.pinchart@...asonboard.com>
To:	Mark Brown <broonie@...nel.org>
Cc:	Linus Walleij <linus.walleij@...aro.org>,
	Benjamin Herrenschmidt <benh@...nel.crashing.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
	Grant Likely <grant.likely@...aro.org>,
	Guennadi Liakhovetski <g.liakhovetski@....de>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>
Subject: Re: How to create IRQ mappings in a GPIO driver that doesn't control its IRQ domain ?

Hi Mark,

On Thursday 25 July 2013 14:15:56 Mark Brown wrote:
> On Thu, Jul 25, 2013 at 11:45:33AM +0200, Laurent Pinchart wrote:
> > The two devices are independent, so there's no real parent/child
> > relationship. However, as Grant proposed, I could list all the interrupts
> > associated with GPIOs in the GPIO controller DT node. I would then just
> > call irq_of_parse_and_map() in the .to_irq() handler to magically
> > translate the GPIO number to a mapped IRQ number.
> > 
> > The number of interrupts can be pretty high (up to 58 in the worst case so
> > far), so an alternative would be to specify the interrupt-parent only, and
> > call irq_create_of_mapping() directly. What solution would you prefer ?
> 
> Are the interrupts in a contiguous block in the controller so you can just
> pass around the controller and a base number?

In two of the three SoCs I need to fix they are. I've just realized that in 
the last one the interrupts are in two contiguous blocks in two different 
parents. I will thus need at least a list of <parent-phandle base count>. Our 
standard interrupt bindings don't seem to support multiple parents, is that 
something that we want to fix or should I go for custom bindings ?

-- 
Regards,

Laurent Pinchart

Download attachment "signature.asc" of type "application/pgp-signature" (491 bytes)

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ