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Message-ID: <CAJAp7OgOT82G=W8RpDvaogskUmAN26CWq4gKUs45RwOeU8pXvQ@mail.gmail.com>
Date: Tue, 30 Jul 2013 16:19:44 -0800
From: Bjorn Andersson <bjorn@...o.se>
To: Georgi Djakov <gdjakov@...sol.com>
Cc: linux-mmc@...r.kernel.org, cjb@...top.org, grant.likely@...aro.org,
rob.herring@...xeda.com, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org, linux-arm-msm@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
Asutosh Das <asutoshd@...eaurora.org>,
Venkat Gopalakrishnan <venkatg@...eaurora.org>,
Sahitya Tummala <stummala@...eaurora.org>,
Subhash Jadavani <subhashj@...eaurora.org>
Subject: Re: [PATCH] mmc: sdhci-msm: Add support for MSM chipsets
On Tue, Jul 30, 2013 at 8:22 AM, Georgi Djakov <gdjakov@...sol.com> wrote:
> This platform driver adds the support of Secure Digital Host
> Controller Interface compliant controller in MSM chipsets.
>
> [snip]
> +
> + sdhc_1: qcom,sdhc@...24900 {
> + compatible = "qcom,sdhci-msm";
> + reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
> + reg-names = "hc_mem", "core_mem";
> + interrupts = <0 123 0>, <0 138 0>;
> + interrupt-names = "hc_irq", "pwr_irq";
> +
> + vdd-supply = <&pm8941_l21>;
> + vdd-io-supply = <&pm8941_l13>;
> + qcom,vdd-voltage-level = <2950000 2950000>;
> + qcom,vdd-current-level = <9000 800000>;
> +
> + qcom,vdd-io-always-on;
> + qcom,vdd-io-lpm-sup;
> + qcom,vdd-io-voltage-level = <1800000 2950000>;
> + qcom,vdd-io-current-level = <6 22000>;
> +
> + bus-width = <4>;
> + non-removable;
> + qcom,bus-speed-mode = "HS200_1p8v", "DDR_1p8v";
> +
> + gpios = <&msmgpio 40 0>, /* CLK */
> + <&msmgpio 39 0>, /* CMD */
> + <&msmgpio 38 0>, /* DATA0 */
> + <&msmgpio 37 0>, /* DATA1 */
> + <&msmgpio 36 0>, /* DATA2 */
> + <&msmgpio 35 0>; /* DATA3 */
> + qcom,gpio-names = "CLK", "CMD", "DAT0", "DAT1", "DAT2", "DAT3";
I believe these gpio references (and in the rest of the patch) should
be replaced by pinctrl. As far as I can see it provides what you want
and gives you configurability and potential sleep states of those pins
nicely integrated.
Regards,
Bjorn
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