lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:	Wed, 31 Jul 2013 18:14:06 +0300
From:	Georgi Djakov <gdjakov@...sol.com>
To:	Bjorn Andersson <bjorn@...o.se>
CC:	linux-mmc@...r.kernel.org, cjb@...top.org, grant.likely@...aro.org,
	rob.herring@...xeda.com, linux-kernel@...r.kernel.org,
	devicetree@...r.kernel.org, linux-arm-msm@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org,
	Asutosh Das <asutoshd@...eaurora.org>,
	Venkat Gopalakrishnan <venkatg@...eaurora.org>,
	Sahitya Tummala <stummala@...eaurora.org>,
	Subhash Jadavani <subhashj@...eaurora.org>
Subject: Re: [PATCH] mmc: sdhci-msm: Add support for MSM chipsets

On 07/31/2013 03:19 AM, Bjorn Andersson wrote:
> On Tue, Jul 30, 2013 at 8:22 AM, Georgi Djakov <gdjakov@...sol.com> wrote:
>> This platform driver adds the support of Secure Digital Host
>> Controller Interface compliant controller in MSM chipsets.
>>
>> [snip]
>> +
>> +       sdhc_1: qcom,sdhc@...24900 {
>> +               compatible = "qcom,sdhci-msm";
>> +                       reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
>> +                       reg-names = "hc_mem", "core_mem";
>> +                       interrupts = <0 123 0>, <0 138 0>;
>> +                       interrupt-names = "hc_irq", "pwr_irq";
>> +
>> +               vdd-supply = <&pm8941_l21>;
>> +               vdd-io-supply = <&pm8941_l13>;
>> +               qcom,vdd-voltage-level = <2950000 2950000>;
>> +               qcom,vdd-current-level = <9000 800000>;
>> +
>> +               qcom,vdd-io-always-on;
>> +               qcom,vdd-io-lpm-sup;
>> +               qcom,vdd-io-voltage-level = <1800000 2950000>;
>> +               qcom,vdd-io-current-level = <6 22000>;
>> +
>> +               bus-width = <4>;
>> +               non-removable;
>> +               qcom,bus-speed-mode = "HS200_1p8v", "DDR_1p8v";
>> +
>> +               gpios = <&msmgpio 40 0>, /* CLK */
>> +                       <&msmgpio 39 0>, /* CMD */
>> +                       <&msmgpio 38 0>, /* DATA0 */
>> +                       <&msmgpio 37 0>, /* DATA1 */
>> +                       <&msmgpio 36 0>, /* DATA2 */
>> +                       <&msmgpio 35 0>; /* DATA3 */
>> +               qcom,gpio-names = "CLK", "CMD", "DAT0", "DAT1", "DAT2", "DAT3";
>
> I believe these gpio references (and in the rest of the patch) should
> be replaced by pinctrl. As far as I can see it provides what you want
> and gives you configurability and potential sleep states of those pins
> nicely integrated.
>

Thanks! I'll make it use the pinctrl driver that is coming too.

BR,
Georgi
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ