lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20130805171653.GA22372@phenom.dumpdata.com>
Date:	Mon, 5 Aug 2013 13:16:53 -0400
From:	Konrad Rzeszutek Wilk <konrad.wilk@...cle.com>
To:	"H. Peter Anvin" <hpa@...or.com>
Cc:	Gleb Natapov <gleb@...hat.com>,
	Mukesh Rathor <mukesh.rathor@...cle.com>,
	Mike Rapoport <mike.rapoport@...il.com>,
	Rusty Russell <rusty@...tcorp.com.au>,
	Ramkumar Ramachandra <artagnon@...il.com>,
	LKML <linux-kernel@...r.kernel.org>,
	xen-devel@...ts.xensource.com
Subject: Re: [QUERY] lguest64

> >>>          struct pv_cpu_ops pv_cpu_ops;                                           
> >>> 		[only end up using cpuid. This one is a tricky one. We could
> >>> 		 arguable remove it but it does do some filtering - for example
> >>> 	 	 THERM is turned off, or MWAIT if a certain hypercall tells us to
> >>> 		 disable that. Since this is now a trapped operation this could be
> >>> 		 handled in the hypervisor - but then it would be in charge of
> >>> 		 filtering certain CPUID - and this is at bootup - so there is not
> >>> 		 user interaction. This needs a bit more of thinking]
> >>>
> >> read_msr/write_msr in this one make all msr accesses safe. IIRC there
> >> are MSRs that Linux uses without checking cpuid bits.
> >> IA32_PERF_CAPABILITIES for instance is used without checking PDCM bit.
> > 
> > Right, those are needed as well. Completly forgot about them.
> 
> CPUID is not too bad.  RDMSR/WRMSR is actually worse since there are
> some MSRs which are performance-critical.  The really messy pvops are
> the memory-related ones, as they don't match the hardware behavior.

Would you have a by any chance a nice test-case to demonstrate the
rdmsr/wrmsr paths which performance-critical under baremetal?
> 
> Similarly, beyond pvops, what new assumptions does this code add to the
> code base?

We have not yet narrowed down on how to "negotiate" the GDT values - as
the VMX code in the hypervisor has setup those before it loads the kernel.
I think Mukesh was thinking to extend the .Xen.note to enumerate some of the
ones that are needed and somehow the hypervisor slurps them in.

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ