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Date:	Mon, 12 Aug 2013 17:38:26 +0200
From:	Stephane Eranian <eranian@...gle.com>
To:	Andi Kleen <ak@...ux.intel.com>
Cc:	Peter Zijlstra <peterz@...radead.org>,
	"Yan, Zheng" <zheng.z.yan@...el.com>,
	LKML <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 3/3] perf, uncore: enable ev_sel_ext bit for PCU.

Hi,

How about:

This patch adds support for the SNB-EP PCU uncore PMU extra_sel_bit
(bit 21) which is
missing from the documentation in Table-2.75 of Intel® Xeon® Processor
E5-2600 Product Family
Uncore Performance Monitoring Guide. It is referred to later in
Table-2.81. Without this
selection bit explicitly enabled by the kernel, some events such as
COREx_TRANSITION_CYCLES do not count correctly.



On Mon, Aug 12, 2013 at 5:29 PM, Andi Kleen <ak@...ux.intel.com> wrote:
> On Mon, Aug 12, 2013 at 05:16:32PM +0200, Peter Zijlstra wrote:
>> On Wed, Aug 07, 2013 at 02:17:25PM +0800, Yan, Zheng wrote:
>> > From: "Yan, Zheng" <zheng.z.yan@...el.com>
>> >
>> > PCU uncore event control register has a undocumented ev_sel_ext bit.
>> > The bit is needed by Andi's pmu-tools.
>>
>> Please provide documentation. Andi needing it isn't a good changelog (or
>> even reason).
>
> The bit is in the uncore guide, just not in the register documentation,
> but in the event descriptions.
>
> e.g. the PCU part calls it "Extra Select Bit"
>
> -Andi
>
> --
> ak@...ux.intel.com -- Speaking for myself only
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