linux-kernel - Re: [PATCH 1/3 v3] pinctrl: ADI PIN control driver for the GPIO controller on bf54x and bf60x.

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Message-ID: <CACRpkdYum46J1PEhEhhSjnJ3Chmqpw4enqcoH1YSwD5itoRBVA@mail.gmail.com>
Date:	Fri, 30 Aug 2013 10:43:23 +0200
From:	Linus Walleij <linus.walleij@...aro.org>
To:	Sonic Zhang <sonic.adi@...il.com>
Cc:	Stephen Warren <swarren@...dotorg.org>,
	Grant Likely <grant.likely@...aro.org>,
	Steven Miao <realmz6@...il.com>,
	LKML <linux-kernel@...r.kernel.org>,
	adi-buildroot-devel@...ts.sourceforge.net,
	Sonic Zhang <sonic.zhang@...log.com>
Subject: Re: [PATCH 1/3 v3] pinctrl: ADI PIN control driver for the GPIO
 controller on bf54x and bf60x.

On Thu, Aug 29, 2013 at 11:36 AM, Sonic Zhang <sonic.adi@...il.com> wrote:
> On Thu, Aug 29, 2013 at 4:19 PM, Linus Walleij <linus.walleij@...aro.org> wrote:

>> So splitting each block into a separate pin control device is definately
>> one way to skin the cat.
>>
>> The ux500 would then have 9 pin controller instances (after a
>> big fat refactoring, but whatever) instead of 9 GPIO instances
>> and one pinctrl instance referencing them. Also this solves
>> the problem of registering GPIO ranges from the wrong end
>> of the pin controller.
(...)
> The pin controller device can be defined as a logic device to cover
> many gpio devices, which are mapped into the same pin id space without
> collision. All overhead in the soc data file can be removed in this
> way. GPIO devices with pin id region collision should be put into
> different pin controller devices.

This is true for your device and if that works for you then go
ahead with this.

In the Nomadik case the registers for GPIO and pin control
are mingled in the same memory range so things are more
complex.

Yours,
Linus Walleij
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