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Date: Wed, 25 Sep 2013 13:22:18 +0200 From: Lukasz Majewski <l.majewski@...sung.com> To: "Rafael J. Wysocki" <rjw@...k.pl>, Viresh Kumar <viresh.kumar@...aro.org> Cc: Linux PM list <linux-pm@...r.kernel.org>, Lukasz Majewski <l.majewski@...sung.com>, Lukasz Majewski <l.majewski@...ess.pl>, linux-kernel <linux-kernel@...r.kernel.org>, Bartlomiej Zolnierkiewicz <b.zolnierkie@...sung.com>, Tomasz Figa <t.figa@...sung.com>, Myungjoo Ham <myungjoo.ham@...sung.com>, Kukjin Kim <kgene@...nel.org>, Kukjin Kim <kgene.kim@...sung.com>, linux-samsung-soc@...r.kernel.org Subject: [PATCH 2/2] cpufreq: exynos4210: Use the common clock framework to set APLL clock rate In the exynos4210_set_apll() function, the APLL frequency is set with direct register manipulation. Such approach is not allowed in the common clock framework. The frequency is changed, but the corresponding clock value is not updated. This causes wrong frequency read from cpufreq's cpuinfo_cur_freq sysfs attribute. Tested at: - Exynos4210 - Trats board (linux 3.12-rc1) Signed-off-by: Lukasz Majewski <l.majewski@...sung.com> --- drivers/cpufreq/exynos4210-cpufreq.c | 20 ++++---------------- 1 file changed, 4 insertions(+), 16 deletions(-) diff --git a/drivers/cpufreq/exynos4210-cpufreq.c b/drivers/cpufreq/exynos4210-cpufreq.c index add7fbe..363c658 100644 --- a/drivers/cpufreq/exynos4210-cpufreq.c +++ b/drivers/cpufreq/exynos4210-cpufreq.c @@ -81,9 +81,9 @@ static void exynos4210_set_clkdiv(unsigned int div_index) static void exynos4210_set_apll(unsigned int index) { - unsigned int tmp; + unsigned int tmp, freq = apll_freq_4210[index].freq; - /* 1. MUX_CORE_SEL = MPLL, ARMCLK uses MPLL for lock time */ + /* MUX_CORE_SEL = MPLL, ARMCLK uses MPLL for lock time */ clk_set_parent(moutcore, mout_mpll); do { @@ -92,21 +92,9 @@ static void exynos4210_set_apll(unsigned int index) tmp &= 0x7; } while (tmp != 0x2); - /* 2. Set APLL Lock time */ - __raw_writel(EXYNOS4_APLL_LOCKTIME, EXYNOS4_APLL_LOCK); - - /* 3. Change PLL PMS values */ - tmp = __raw_readl(EXYNOS4_APLL_CON0); - tmp &= ~((0x3ff << 16) | (0x3f << 8) | (0x7 << 0)); - tmp |= apll_freq_4210[index].mps; - __raw_writel(tmp, EXYNOS4_APLL_CON0); - - /* 4. wait_lock_time */ - do { - tmp = __raw_readl(EXYNOS4_APLL_CON0); - } while (!(tmp & (0x1 << EXYNOS4_APLLCON0_LOCKED_SHIFT))); + clk_set_rate(mout_apll, freq * 1000); - /* 5. MUX_CORE_SEL = APLL */ + /* MUX_CORE_SEL = APLL */ clk_set_parent(moutcore, mout_apll); do { -- 1.7.10.4 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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