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Message-ID: <524452E3.6050200@linux.intel.com>
Date: Thu, 26 Sep 2013 08:29:39 -0700
From: Arjan van de Ven <arjan@...ux.intel.com>
To: "Srivatsa S. Bhat" <srivatsa.bhat@...ux.vnet.ibm.com>
CC: Andrew Morton <akpm@...ux-foundation.org>, mgorman@...e.de,
dave@...1.net, hannes@...xchg.org, tony.luck@...el.com,
matthew.garrett@...ula.com, riel@...hat.com,
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Subject: Re: [Results] [RFC PATCH v4 00/40] mm: Memory Power Management
On 9/26/2013 5:58 AM, Srivatsa S. Bhat wrote:
> Let me explain the challenge I am facing. A prototype powerpc platform that
> I work with has the capability to transition memory banks to content-preserving
> low-power states at a per-socket granularity. What that means is that we can
> get memory power savings*without* needing to go to full-system-idle, unlike
> Intel platforms such as Sandybridge.
btw this is not a correct statement
even Sandybridge can put memory in low power states (just not self refresh) even if the system is not idle
(depending on bios settings to enable this)
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