linux-kernel - Re: [PATCH v2 3/4] ARM: EXYNOS: add Exynos Dual Cluster Support

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Date:	Thu, 17 Oct 2013 15:32:04 +0100
From:	Dave Martin <Dave.Martin@....com>
To:	Daniel Lezcano <daniel.lezcano@...aro.org>
Cc:	Vyacheslav Tyrtov <v.tyrtov@...sung.com>,
	linux-kernel@...r.kernel.org, Mark Rutland <mark.rutland@....com>,
	devicetree@...r.kernel.org, Kukjin Kim <kgene.kim@...sung.com>,
	Russell King <linux@....linux.org.uk>,
	Ben Dooks <ben-linux@...ff.org>,
	Pawel Moll <pawel.moll@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Nicolas Pitre <nicolas.pitre@...aro.org>,
	Stephen Warren <swarren@...dotorg.org>,
	linux-doc@...r.kernel.org, Rob Herring <rob.herring@...xeda.com>,
	Tarek Dakhran <t.dakhran@...sung.com>,
	linux-samsung-soc@...r.kernel.org, Rob Landley <rob@...dley.net>,
	Mike Turquette <mturquette@...aro.org>,
	Thomas Gleixner <tglx@...utronix.de>,
	Naour Romain <romain.naour@...nwide.fr>,
	Lorenzo Pieralisi <Lorenzo.Pieralisi@....com>,
	linux-arm-kernel@...ts.infradead.org,
	Heiko Stuebner <heiko@...ech.de>
Subject: Re: [PATCH v2 3/4] ARM: EXYNOS: add Exynos Dual Cluster Support

On Thu, Oct 17, 2013 at 12:45:29PM +0200, Daniel Lezcano wrote:
> On 10/14/2013 05:08 PM, Vyacheslav Tyrtov wrote:
> > From: Tarek Dakhran <t.dakhran@...sung.com>
> > 
> > Add EDCS(Exynos Dual Cluster Support) for Samsung Exynos5410 SoC.
> > This enables all 8 cores, 4 x A7 and 4 x A15 run at the same time.

[...]

> > +	__mcpm_cpu_down(cpu, cluster);
> > +
> > +	if (!skip_wfi) {
> > +		exynos_core_power_down(cpu, cluster);
> > +		wfi();
> > +	}
> > +}
> 
> I did not looked line by line but these functions looks very similar
> than the tc2_pm.c's function. no ?

This is true.

> May be some code consolidation could be considered here.
> 
> Added Nico and Lorenzo in Cc.
> 
> Thanks
>   -- Daniel

Nico can commnent further, but I think the main concern here was that
this code shouldn't be factored prematurely.

There are many low-level platform specifics involved here, so it's
hard to be certain that all platforms could fit into a more abstracted
framework until we have some evidence to look at.

This could be revisited when we have a few diverse MCPM ports to
compare.


The low-level A15/A7 cacheflush sequence is already being factored
by Nico [1].

Cheers
---Dave

[1] http://lists.infradead.org/pipermail/linux-arm-kernel/2013-October/205085.html
[PATCH] ARM: cacheflush: consolidate single-CPU ARMv7 cache disabling code

[...]
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