linux-kernel - [PATCH v2 5/5] ARM: sun7i: a20: Add support for the High Speed Timers

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Message-Id: <1382706463-3892-6-git-send-email-maxime.ripard@free-electrons.com>
Date:	Fri, 25 Oct 2013 14:07:43 +0100
From:	Maxime Ripard <maxime.ripard@...e-electrons.com>
To:	daniel.lezcano@...aro.org, tglx@...utronix.de
Cc:	linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
	sboyd@...eaurora.org, kevin.z.m.zh@...il.com,
	sunny@...winnertech.com, shuge@...winnertech.com,
	zhuzhenhua@...winnertech.com,
	Gregory Clement <gregory.clement@...e-electrons.com>,
	Maxime Ripard <maxime.ripard@...e-electrons.com>
Subject: [PATCH v2 5/5] ARM: sun7i: a20: Add support for the High Speed Timers

The Allwinner A20 has support for four high speed timers. Apart for the
number of timers (4 vs 2), it's basically the same logic than the high
speed timers found in the sun5i chips.

Now that we have a driver to support it, we can enable them in the
device tree.

Signed-off-by: Maxime Ripard <maxime.ripard@...e-electrons.com>
Tested-by: Emilio López <emilio@...pez.com.ar>
---
 arch/arm/boot/dts/sun7i-a20.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index e46cfed..ee6cec7 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -395,6 +395,16 @@
 			status = "disabled";
 		};
 
+		hstimer@...60000 {
+			compatible = "allwinner,sun7i-a20-hstimer";
+			reg = <0x01c60000 0x1000>;
+			interrupts = <0 81 1>,
+				     <0 82 1>,
+				     <0 83 1>,
+				     <0 84 1>;
+			clocks = <&ahb_gates 28>;
+		};
+
 		gic: interrupt-controller@...81000 {
 			compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
 			reg = <0x01c81000 0x1000>,
-- 
1.8.4

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