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Message-ID: <20131028105731.GF4314@pd.tnic>
Date: Mon, 28 Oct 2013 11:57:31 +0100
From: Borislav Petkov <bp@...en8.de>
To: Andreas Werner <wernerandy@....de>
Cc: Ingo Molnar <mingo@...nel.org>, tglx@...utronix.de,
mingo@...hat.com, hpa@...or.com, x86@...nel.org,
dave@...ux.vnet.ibm.com, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] X86: MM: Add PAT Type write-through in combination with
mtrr
On Mon, Oct 28, 2013 at 11:34:28AM +0100, Andreas Werner wrote:
> Yes the reads are only for packet data, the commands or configuration
> registers are mapped non cachable.
>
> I´ve tried WB, but on PCIe Tracer i could not see any burst access.
> Thats the reason why i have created this patch.
>
> Is there a chance to get this patch into the kernel? Or
> is this solution so special?
Ok, but your patch returns WB pat type for WT MTRR type, AFAICT.
You want to do:
PAT=Write-Back + MTRR=Write-Through = Effective Memory of Write-Through
but you end up doing
PAT=Write-Back + MTRR=Write-Through = Effective Memory of Write-Back
What am I missing or misunderstanding?
AFAICT, you want to return _PAGE_PWT for MTRR_TYPE_WRTHROUGH, no?
--
Regards/Gruss,
Boris.
Sent from a fat crate under my desk. Formatting is fine.
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