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Message-ID: <OF57D6EF77.CD2E45CE-ON42257C16.005AA6D8-42257C16.005AB961@il.ibm.com>
Date:	Fri, 1 Nov 2013 18:30:56 +0200
From:	Victor Kaplansky <VICTORK@...ibm.com>
To:	"David Laight" <David.Laight@...lab.com>
Cc:	"Anton Blanchard" <anton@...ba.org>,
	"Frederic Weisbecker" <fweisbec@...il.com>,
	"LKML" <linux-kernel@...r.kernel.org>,
	"Linux PPC dev" <linuxppc-dev@...abs.org>,
	"Mathieu Desnoyers" <mathieu.desnoyers@...ymtl.ca>,
	"Michael Neuling" <mikey@...ling.org>,
	"Oleg Nesterov" <oleg@...hat.com>, paulmck@...ux.vnet.ibm.com,
	"Peter Zijlstra" <peterz@...radead.org>
Subject: RE: perf events ring buffer memory barrier on powerpc

"David Laight" <David.Laight@...lab.com> wrote on 11/01/2013 06:25:29 PM:
> gcc will do unexpected memory accesses for bit fields that are
> adjacent to volatile data.
> In particular it may generate 64bit sized (and aligned) RMW cycles
> when accessing bit fields.
> And yes, this has caused real problems.

Thanks, I am aware about this bug/feature in gcc.
-- Victor

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