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Message-ID: <AE90C24D6B3A694183C094C60CF0A2F6026B73D4@saturn3.aculab.com>
Date: Fri, 1 Nov 2013 16:25:29 -0000
From: "David Laight" <David.Laight@...LAB.COM>
To: "Victor Kaplansky" <VICTORK@...ibm.com>,
<paulmck@...ux.vnet.ibm.com>
Cc: "Michael Neuling" <mikey@...ling.org>,
"Mathieu Desnoyers" <mathieu.desnoyers@...ymtl.ca>,
"Peter Zijlstra" <peterz@...radead.org>,
"LKML" <linux-kernel@...r.kernel.org>,
"Oleg Nesterov" <oleg@...hat.com>,
"Linux PPC dev" <linuxppc-dev@...abs.org>,
"Anton Blanchard" <anton@...ba.org>,
"Frederic Weisbecker" <fweisbec@...il.com>
Subject: RE: perf events ring buffer memory barrier on powerpc
> But "broken" compiler is much wider issue to be deeply discussed in this
> thread. I'm pretty sure that kernel have tons of very subtle
> code that actually creates locks and memory ordering. Such code
> usually just use the "barrier()" approach to tell gcc not to combine
> or move memory accesses around it.
gcc will do unexpected memory accesses for bit fields that are
adjacent to volatile data.
In particular it may generate 64bit sized (and aligned) RMW cycles
when accessing bit fields.
And yes, this has caused real problems.
David
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