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Message-ID: <CAErSpo4DNqUpA6Cb_tanW3uRJ3J-4utCQwtRz3eYZETCMtniUQ@mail.gmail.com>
Date: Tue, 3 Dec 2013 10:39:06 -0700
From: Bjorn Helgaas <bhelgaas@...gle.com>
To: Jagan Teki <jagannadh.teki@...il.com>
Cc: "linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: Need help on Linux PCIe
On Tue, Dec 3, 2013 at 4:24 AM, Jagan Teki <jagannadh.teki@...il.com> wrote:
> Hi,
>
> I have few question on Linux PCIe subsystem, I am trying to understand
> the PCIe on ARM platform.
> 1. Compared to PCI, PCIe have an extra port functionalists/services
> which is implemented drivers/pci/pcie/* is it true?
Yes.
> 2. PCIe root complex is same as Host controller drivers in linux drivers/host/*
Yes.
> 3. As individual endpoint drivers are registered to pci_core as
> pci_driver_register, then what is the common call for registering
> individual HC driver to pci-core?
The host controller-PCI core interface is not as mature as the
pci_register_driver() interface. The basic interface is
pci_scan_root_bus(). If you skim through the drivers in
drivers/pci/host/* and drivers/acpi/pci_root.c, the interface to the
PCI core will be fairly obvious. And you'll learn what the existing
practices are in case you need to add or modify something.
> 4. Can you list-down the basic and advanced functionalists supported
> by HC driver in PCIe?
The HC driver supplies struct pci_ops (functions to access config
space), and the resources (bus numbers, MMIO aperture, I/O aperture)
routed to the PCI/PCIe hierarchy below the host bridge. These are all
supplied to pci_scan_root_bus(). There might also be chipset
initialization and error handling logic in the HC driver.
Pretty much everything else is generic and is supported by PCI core code.
> 5. The PCIe port bus driver is common core? means no need to change w.r.t SOC?
Yes.
Bjorn
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