lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:	Wed, 4 Dec 2013 11:50:26 +0530
From:	Jagan Teki <jagannadh.teki@...il.com>
To:	Bjorn Helgaas <bhelgaas@...gle.com>
Cc:	"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: Need help on Linux PCIe

Thanks for your quick response.
Please find my comments below.

On Tue, Dec 3, 2013 at 11:09 PM, Bjorn Helgaas <bhelgaas@...gle.com> wrote:
> On Tue, Dec 3, 2013 at 4:24 AM, Jagan Teki <jagannadh.teki@...il.com> wrote:
>> Hi,
>>
>> I have few question on Linux PCIe subsystem, I am trying to understand
>> the PCIe on ARM platform.
>> 1. Compared to PCI, PCIe have an extra port functionalists/services
>> which is implemented drivers/pci/pcie/* is it true?
>
> Yes.
>
>> 2. PCIe root complex is same as Host controller drivers in linux drivers/host/*
>
> Yes.
>
>> 3. As individual endpoint drivers are registered to pci_core as
>> pci_driver_register, then what is the common call for registering
>> individual HC driver to pci-core?
>
> The host controller-PCI core interface is not as mature as the
> pci_register_driver() interface.  The basic interface is
> pci_scan_root_bus().  If you skim through the drivers in
> drivers/pci/host/* and drivers/acpi/pci_root.c, the interface to the
> PCI core will be fairly obvious.  And you'll learn what the existing
> practices are in case you need to add or modify something.

OK.

I understand the flow as below - please correct if am wrong.

>From low level (hw) - HC driver has a platform registration using
platform_driver_register() to lower layer
and then pci_scan_root_bus() --> pci_common_init_dev() registration to
upper layer as PCI - BIOS and then ends.

>From upper level (app) - each endpoint driver has
pci_driver_register() call to PCI Core for lower level and then the
upper
level registration is based on endpoint().

What is the connection here for PCI-BIOS and PCI-Core here, does these
are two different entities means there is no common call for these?
I see for ARM - "arch/arm/kernel/bios32.c" is PCI-BIOS is it correct?
does we have separate BIOS codes for architectures?

-- 
Thanks,
Jagan.
--------
Jagannadha Sutradharudu Teki,
E: jagannadh.teki@...il.com, P: +91-9676773388
Engineer - System Software Hacker
U-boot - SPI Custodian and Zynq APSOC
Ln: http://www.linkedin.com/in/jaganteki
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ