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Message-ID: <1386941755.17095.2.camel@phoenix>
Date:	Fri, 13 Dec 2013 21:35:55 +0800
From:	Axel Lin <axel.lin@...ics.com>
To:	Linus Walleij <linus.walleij@...aro.org>
Cc:	Bjorn Andersson <bjorn.andersson@...ymobile.com>,
	linux-kernel@...r.kernel.org
Subject: [RFT][PATCH] pinctrl: msm: Fix set gpio setting

Set g->out_bit bit for gpio output high, clear g->out_bit bit for gpio output
low.

Signed-off-by: Axel Lin <axel.lin@...ics.com>
---
Hi Bjorn,
I don't have the datasheet, just found current code does not make sense
because current code unconditionally set BIT(g->out_bit) in msm_gpio_set.
I assume setting g->out_bit bit for gpio output high, clear the bit
for gpio output low.
Please check if this patch is correct.

Thanks,
Axel

 drivers/pinctrl/pinctrl-msm.c | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/drivers/pinctrl/pinctrl-msm.c b/drivers/pinctrl/pinctrl-msm.c
index 28b90ab..4537d0d 100644
--- a/drivers/pinctrl/pinctrl-msm.c
+++ b/drivers/pinctrl/pinctrl-msm.c
@@ -435,7 +435,12 @@ static int msm_gpio_direction_output(struct gpio_chip *chip, unsigned offset, in
 
 	spin_lock_irqsave(&pctrl->lock, flags);
 
-	writel(value ? BIT(g->out_bit) : 0, pctrl->regs + g->io_reg);
+	val = readl(pctrl->regs + g->io_reg);
+	if (value)
+		val |= BIT(g->out_bit);
+	else
+		val &= ~BIT(g->out_bit);
+	writel(val, pctrl->regs + g->io_reg);
 
 	val = readl(pctrl->regs + g->ctl_reg);
 	val |= BIT(g->oe_bit);
@@ -476,7 +481,10 @@ static void msm_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
 	spin_lock_irqsave(&pctrl->lock, flags);
 
 	val = readl(pctrl->regs + g->io_reg);
-	val |= BIT(g->out_bit);
+	if (value)
+		val |= BIT(g->out_bit);
+	else
+		val &= ~BIT(g->out_bit);
 	writel(val, pctrl->regs + g->io_reg);
 
 	spin_unlock_irqrestore(&pctrl->lock, flags);
-- 
1.8.1.2



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