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Message-ID: <52B187F5.7020105@nvidia.com>
Date:	Wed, 18 Dec 2013 19:33:09 +0800
From:	bilhuang <bilhuang@...dia.com>
To:	Viresh Kumar <viresh.kumar@...aro.org>
CC:	"Rafael J. Wysocki" <rjw@...ysocki.net>,
	Stephen Warren <swarren@...dotorg.org>,
	"thierry.reding@...il.com" <thierry.reding@...il.com>,
	Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
	"cpufreq@...r.kernel.org" <cpufreq@...r.kernel.org>,
	"linux-pm@...r.kernel.org" <linux-pm@...r.kernel.org>,
	"linux-tegra@...r.kernel.org" <linux-tegra@...r.kernel.org>
Subject: Re: [PATCH v3 2/2] cpufreq: tegra: Re-model Tegra cpufreq driver

On 12/18/2013 07:11 PM, Viresh Kumar wrote:
> On 17 December 2013 16:22, bilhuang <bilhuang@...dia.com> wrote:
>> Tegra20 DVFS is a little bit complicated due to the fact that we can't scale
>> VDD_CPU directly, there are constraints or relationship to other power rails
>> so I don't think it is a good idea to use generic cpufreq-cpu0 driver if
>> we're going to support voltage scaling.
>
> But why can't we handle that in a CPU specific regulator code?
>
cpufreq-cpu0 driver will call regulator_set_voltage_tol() directly 
according to the pre-defined OPP freq/volt pairs, the regulator drivers 
could be shared by other SoC so is not suitable to handle this, or do I 
misunderstand?
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