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Message-Id: <1388105067-24438-8-git-send-email-abrestic@chromium.org>
Date: Thu, 26 Dec 2013 16:44:27 -0800
From: Andrew Bresticker <abrestic@...omium.org>
To: Mike Turquette <mturquette@...aro.org>,
Stephen Warren <swarren@...dotorg.org>
Cc: Thierry Reding <thierry.reding@...il.com>,
Peter De Schrijver <pdeschrijver@...dia.com>,
Prashant Gaikwad <pgaikwad@...dia.com>,
linux-tegra@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
Andrew Bresticker <abrestic@...omium.org>
Subject: [PATCH 7/7] clk: tegra: use max divider if divider overflows
When requesting a rate less than the minimum clock rate for a divider,
use the maximum divider value instead of bailing out with an error.
This matches the behavior of the generic clock divider.
Signed-off-by: Andrew Bresticker <abrestic@...omium.org>
---
drivers/clk/tegra/clk-divider.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/tegra/clk-divider.c b/drivers/clk/tegra/clk-divider.c
index 4d75b1f..290f9c1 100644
--- a/drivers/clk/tegra/clk-divider.c
+++ b/drivers/clk/tegra/clk-divider.c
@@ -59,7 +59,7 @@ static int get_div(struct tegra_clk_frac_div *divider, unsigned long rate,
return 0;
if (divider_ux1 > get_max_div(divider))
- return -EINVAL;
+ return get_max_div(divider);
return divider_ux1;
}
--
1.8.5.1
--
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