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Date:	Fri, 03 Jan 2014 19:30:08 -0500 (EST)
From:	David Miller <davem@...emloft.net>
To:	bhelgaas@...gle.com
Cc:	jesse.brandeburg@...il.com, linux-pci@...r.kernel.org,
	jeffrey.t.kirsher@...el.com, netdev@...r.kernel.org,
	gospo@...hat.com, sassmann@...hat.com,
	linux-kernel@...r.kernel.org, bjorn.helgaas@...com
Subject: Re: [net-next] pci_regs.h: Add PCI bus link speed and width defines

From: Bjorn Helgaas <bhelgaas@...gle.com>
Date: Fri, 3 Jan 2014 17:00:42 -0700

> On Fri, Jan 3, 2014 at 4:56 PM, David Miller <davem@...emloft.net> wrote:
>> From: Bjorn Helgaas <bhelgaas@...gle.com>
>> Date: Fri, 3 Jan 2014 15:15:57 -0700
>>
>>> However, I do raise my eyebrows a bit at drivers that poke around in
>>> the PCIe capability.  I would prefer to have PCI core interfaces that
>>> handle that instead.  But I haven't seen Jeff's changes yet.
>>
>> The changes just read the link status to interpret the speed at which
>> the PCI-E link is running at.
> 
> Several drivers want to do that.  It'd be nice if somebody abstracted
> that out somehow.  Jacob added pcie_get_minimum_link() which is
> similar.  But maybe Jeff needs something more in this case.
> 
> In any case, it's not a blocker for this patch.

Ok.

Jeff, please merge this via the Intel submission process and don't forget
to add Bjorn's ACK.

Thanks.
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