linux-kernel - Re: [PATCH v0 04/71] itrace: Infrastructure for instruction flow tracing units

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Date:	Tue, 7 Jan 2014 21:51:45 +0100
From:	Peter Zijlstra <peterz@...radead.org>
To:	Andi Kleen <andi@...stfloor.org>
Cc:	Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
	Ingo Molnar <mingo@...nel.org>,
	Arnaldo Carvalho de Melo <acme@...stprotocols.net>,
	Ingo Molnar <mingo@...hat.com>, linux-kernel@...r.kernel.org,
	David Ahern <dsahern@...il.com>,
	Frederic Weisbecker <fweisbec@...il.com>,
	Jiri Olsa <jolsa@...hat.com>, Mike Galbraith <efault@....de>,
	Namhyung Kim <namhyung@...il.com>,
	Paul Mackerras <paulus@...ba.org>,
	Stephane Eranian <eranian@...gle.com>
Subject: Re: [PATCH v0 04/71] itrace: Infrastructure for instruction flow
 tracing units

On Tue, Jan 07, 2014 at 04:42:55PM +0100, Andi Kleen wrote:
> > Yes; go read this:
> > 
> >  lkml.kernel.org/r/20131219125205.GT3694@...ns.programming.kicks-ass.net
> 
> Hmm, but AFAIK we're not using freeze counters on PMI today.
> We just rely on the explicit disabling in the counters through the global
> ctrl.
> 
> So it should be the same as with any other PMI which also does not
> automatically freeze. Not true?

Regardless whether its used or not; I'd very much like that answered.

> Or do you mean interaction with the LBRs here?
> (currently LBRs and PT are mutually exclusive)

Yes we very much rely on the FREEZE bits for LBR. PT and LBR being
mutually exclusive wasn't documented (or I missed it) and completely
blows.
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