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Message-ID: <CAD=FV=WV+1S65zwKRAuOfSnWzWxT_NNpYHUcj6bVyyRNXUfcGw@mail.gmail.com>
Date:	Wed, 8 Jan 2014 13:33:35 -0800
From:	Doug Anderson <dianders@...omium.org>
To:	Russell King - ARM Linux <linux@....linux.org.uk>
Cc:	Will Deacon <will.deacon@....com>,
	Vivek Gautam <gautam.vivek@...sung.com>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-samsung-soc@...r.kernel.org" 
	<linux-samsung-soc@...r.kernel.org>,
	"kgene.kim@...sung.com" <kgene.kim@...sung.com>,
	"sboyd@...eaurora.org" <sboyd@...eaurora.org>,
	David Garbett <David.Garbett@....com>,
	Catalin Marinas <Catalin.Marinas@....com>,
	"gregory.clement@...e-electrons.com" 
	<gregory.clement@...e-electrons.com>,
	Olof Johansson <olofj@...omium.org>
Subject: Re: [PATCH] arm: Add Arm Erratum 773769 for Large data RAM latency.

Russell,

On Wed, Jan 8, 2014 at 1:02 PM, Russell King - ARM Linux
<linux@....linux.org.uk> wrote:
> On Wed, Jan 08, 2014 at 11:43:29AM -0800, Doug Anderson wrote:
>> Olof came up with the idea that you could update the RW firmware
>> (affects initial boot) and then cache away the value and restore it in
>> the kernel after resume.  That would still require a kernel patch but
>> perhaps a less objectionable one.  ...of course if writing this
>> register is a problem in secure mode then maybe that patch would be
>> NAKed anyway.
>
> It's not a problem in secure mode, since secure mode will have access
> to the register.  It's the non-secure mode where various registers
> either ignore writes, or they trigger an exception that are the problem.
>
> Consider what would happen if an exception were to be triggered when no
> exception handlers were installed (eg, because the MMU is not enabled.)

OK, good to know.  ...so if someone wanted to code up this patch and
send upstream they would be able to.  :)

-Doug
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