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Message-ID: <20140115133619.GA32051@pd.tnic>
Date:	Wed, 15 Jan 2014 14:36:19 +0100
From:	Borislav Petkov <bp@...e.de>
To:	Ingo Molnar <mingo@...nel.org>
Cc:	"H. Peter Anvin" <hpa@...or.com>, linux-kernel@...r.kernel.org,
	aravind.gopalakrishnan@....com, tglx@...utronix.de, bp@...e.de,
	hpa@...ux.intel.com, linux-tip-commits@...r.kernel.org
Subject: Re: [tip:x86/urgent] x86, cpu, amd: Add workaround for family 16h,
 erratum 793

On Wed, Jan 15, 2014 at 07:28:17AM +0100, Ingo Molnar wrote:
> > The perhaps only question is if it should be "set/clear_bit_in_msr()"
> > rather than having to haul a full 64-bit mask in the common case.

I'd prefer the _bit() variant because it is easy to use in all those
set-chicken-bit cases.

> I'd suggest the introduction of a standard set of methods operating on 
> MSRs:
> 
> 	msr_read()
> 	msr_write()
> 	msr_set_bit()
> 	msr_clear_bit()
> 	msr_set_mask()
> 	msr_clear_mask()
> 
> etc.
> 
> msr_read() would essentially map to rdmsr_safe(). Each method has a
> return value that can be checked for failure.

I'm not sure we want to use the _safe() variants by default as it would
generate the exception tables even in cases where they're clearly not
needed.

> Note that the naming of 'msr_set_bit()' and 'msr_clear_bit()' mirrors
> that of bitops, and set_mask/clear_mask is named along a similar
> pattern, so that it's more immediately obvious what's going on.

Yes, I completely agree - this is something I will do after the merge
window.

The question about the need for the _mask() variants will be best
answered after going over the sources and checking whether there
actually is a need for setting more than one bit in an MSR.

Thanks.

-- 
Regards/Gruss,
    Boris.

Sent from a fat crate under my desk. Formatting is fine.
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