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Message-ID: <CA+mB=1Lb9cXUwxKG5ZqmDVtFgMgyGBP+G6mugxU-zjFs87_pew@mail.gmail.com>
Date:	Tue, 21 Jan 2014 15:51:15 +0530
From:	Srikanth Thokala <sthokal@...inx.com>
To:	Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
Cc:	Srikanth Thokala <sthokal@...inx.com>, dan.j.williams@...el.com,
	vinod.koul@...el.com, michal.simek@...inx.com,
	Grant Likely <grant.likely@...aro.org>, robh+dt@...nel.org,
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
	devicetree@...r.kernel.org, dmaengine@...r.kernel.org
Subject: Re: [PATCH] Add Xilinx AXI Video DMA Engine driver

Hi Andy,

On Fri, Jan 17, 2014 at 9:02 PM, Andy Shevchenko
<andriy.shevchenko@...ux.intel.com> wrote:
> On Thu, 2014-01-16 at 23:23 +0530, Srikanth Thokala wrote:
>> Hi,
>>
>> This is the driver for Xilinx AXI Video Direct Memory Access Engine.
>> It is a soft IP core, which provides high-bandwidth direct memory
>> access between memory and AXI4-Stream video type target peripherals
>> including peripherals which support AXI4-Stream Video Protocol. The
>> core provides efficient two dimensional DMA operations with independent
>> asynchronous read and write channel operation.
>>
>> For more information on the IP, please refer to
>> http://www.xilinx.com/support/documentation/ip_documentation/axi_vdma/v6_1/pg020_axi_vdma.pdf
>>
>> This patch also provides a test client, which assumes read and write channels
>> of the core are configured in a back-to-back connection.  It transfers
>> data on the write channel, read and verify the data on the read channel.
>>
>>  drivers/dma/xilinx/xilinx_vdma_test.c              |  629 ++++++++
>
> What about to modify dmatest.c accordingly to your needs?
> I see no much sense to have another copy of that in the tree.

I agree with you, we thought it will be good to provide a simple test
case for our driver,
I will drop off this test client from my v2 patch set.

Thanks
Srikanth

>
> --
> Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
> Intel Finland Oy
>
> --
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