linux-kernel - Re: [PATCH v10 1/4] qrwlock: A queue read/write lock implementation

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Message-ID: <CA+55aFzhx6K9A62ve6E5X4juvNPewED_g1nWwq+-EY0fd0A-0g@mail.gmail.com>
Date:	Thu, 23 Jan 2014 09:15:38 -0800
From:	Linus Torvalds <torvalds@...ux-foundation.org>
To:	Waiman Long <waiman.long@...com>
Cc:	Peter Zijlstra <peterz@...radead.org>,
	Thomas Gleixner <tglx@...utronix.de>,
	Ingo Molnar <mingo@...hat.com>,
	"H. Peter Anvin" <hpa@...or.com>, Arnd Bergmann <arnd@...db.de>,
	"linux-arch@...r.kernel.org" <linux-arch@...r.kernel.org>,
	"the arch/x86 maintainers" <x86@...nel.org>,
	Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
	Steven Rostedt <rostedt@...dmis.org>,
	Andrew Morton <akpm@...ux-foundation.org>,
	Michel Lespinasse <walken@...gle.com>,
	Andi Kleen <andi@...stfloor.org>,
	Rik van Riel <riel@...hat.com>,
	"Paul E. McKenney" <paulmck@...ux.vnet.ibm.com>,
	Raghavendra K T <raghavendra.kt@...ux.vnet.ibm.com>,
	George Spelvin <linux@...izon.com>,
	Tim Chen <tim.c.chen@...ux.intel.com>,
	"Chandramouleeswaran, Aswin" <aswin@...com>,
	Scott J Norton <scott.norton@...com>
Subject: Re: [PATCH v10 1/4] qrwlock: A queue read/write lock implementation

On Thu, Jan 23, 2014 at 9:12 AM, Waiman Long <waiman.long@...com> wrote:
>
> I thought that all atomic RMW instructions are memory barrier.

On x86 they are. Not necessarily elsewhere.

> If they are not, what kind of barrier should be added?

smp_mb__before_atomic_xyz() and smp_mb__after_atomic_xyz() will do it,
and are no-op (well, barriers - I don't think it matters) on x86.

            Linus
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