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Message-ID: <CABPqkBRzvfcdKGG4yY9q1PmtVL5Z=9H1RzHg8QDMN42a7=AF6A@mail.gmail.com>
Date: Mon, 10 Feb 2014 23:21:53 +0100
From: Stephane Eranian <eranian@...gle.com>
To: Peter Zijlstra <peterz@...radead.org>
Cc: Don Zickus <dzickus@...hat.com>,
Arnaldo Carvalho de Melo <acme@...stprotocols.net>,
LKML <linux-kernel@...r.kernel.org>,
Jiri Olsa <jolsa@...hat.com>, Joe Mario <jmario@...hat.com>,
Richard Fowles <fowles@...each.com>
Subject: Re: [PATCH 00/21] perf, c2c: Add new tool to analyze cacheline
contention on NUMA systems
On Mon, Feb 10, 2014 at 10:29 PM, Peter Zijlstra <peterz@...radead.org> wrote:
> On Mon, Feb 10, 2014 at 12:28:55PM -0500, Don Zickus wrote:
>> The data output is verbose and there are lots of data tables that interprit the latencies
>> and data addresses in different ways to help see where bottlenecks might be lying.
>
> Would be good to see what the output looks like.
>
> What I haven't seen; and what I would find most useful; is using the IP
> + dwarf info to map it back to a data structure member.
>
> Since you're already using the PEBS data-source fields, you can also
> have a precise IP. For many cases its possible to reconstruct the exact
> data member the instruction is modifying.
>
The tool already uses precise=2 to get the precise IP.
To get from IP to data member, you'd need some debug info which is not
yet emitted
by the compiler.
> At that point you can do pahole like output of data structures, showing
> which members are 'hot' on misses etc.
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