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Message-ID: <20140211071401.GG27965@twins.programming.kicks-ass.net>
Date: Tue, 11 Feb 2014 08:14:01 +0100
From: Peter Zijlstra <peterz@...radead.org>
To: Stephane Eranian <eranian@...gle.com>
Cc: Don Zickus <dzickus@...hat.com>,
Arnaldo Carvalho de Melo <acme@...stprotocols.net>,
LKML <linux-kernel@...r.kernel.org>,
Jiri Olsa <jolsa@...hat.com>, Joe Mario <jmario@...hat.com>,
Richard Fowles <fowles@...each.com>
Subject: Re: [PATCH 00/21] perf, c2c: Add new tool to analyze cacheline
contention on NUMA systems
On Mon, Feb 10, 2014 at 11:21:53PM +0100, Stephane Eranian wrote:
> On Mon, Feb 10, 2014 at 10:29 PM, Peter Zijlstra <peterz@...radead.org> wrote:
> > On Mon, Feb 10, 2014 at 12:28:55PM -0500, Don Zickus wrote:
> >> The data output is verbose and there are lots of data tables that interprit the latencies
> >> and data addresses in different ways to help see where bottlenecks might be lying.
> >
> > Would be good to see what the output looks like.
> >
> > What I haven't seen; and what I would find most useful; is using the IP
> > + dwarf info to map it back to a data structure member.
> >
> > Since you're already using the PEBS data-source fields, you can also
> > have a precise IP. For many cases its possible to reconstruct the exact
> > data member the instruction is modifying.
> >
> The tool already uses precise=2 to get the precise IP.
>
> To get from IP to data member, you'd need some debug info which is not
> yet emitted
> by the compiler.
That blows; how much is missing?
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