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Message-ID: <20140210071556.GL9628@S2101-09.ap.freescale.net>
Date:	Mon, 10 Feb 2014 15:15:59 +0800
From:	Shawn Guo <shawn.guo@...aro.org>
To:	Philipp Zabel <p.zabel@...gutronix.de>
CC:	<linux-kernel@...r.kernel.org>, Mark Brown <broonie@...nel.org>,
	Liam Girdwood <lgirdwood@...il.com>,
	Anson Huang <b20788@...escale.com>, <kernel@...gutronix.de>
Subject: Re: [PATCH 1/2] regulator: anatop: Add power gating support to
 digital LDOs

On Thu, Feb 06, 2014 at 03:43:32PM +0100, Philipp Zabel wrote:
> The ARM, PU, and SOC LDOs in the i.MX6 PMU can completely gate
> their power output. Since power gating is configured by writing
> zero to the voltage target bitfield,, store a copy of the
> voltage selector to be restored when reenabling the regulator.
> 
> Signed-off-by: Philipp Zabel <p.zabel@...gutronix.de>

Nice way to get disabling and bypass supported!  For both patches,

Acked-by: Shawn Guo <shawn.guo@...aro.org>

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