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Message-ID: <20140210152452.GA26684@n2100.arm.linux.org.uk>
Date:	Mon, 10 Feb 2014 15:24:52 +0000
From:	Russell King - ARM Linux <linux@....linux.org.uk>
To:	Dave Martin <Dave.Martin@....com>
Cc:	Fabrice Gasnier <fabrice.gasnier@...com>, jonathan.austin@....com,
	nico@...aro.org, marc.zyngier@....com, catalin.marinas@....com,
	will.deacon@....com, linux-kernel@...r.kernel.org,
	vgupta@...opsys.com, ben.dooks@...ethink.co.uk,
	u.kleine-koenig@...gutronix.de, sboyd@...eaurora.org,
	linux-arm-kernel@...ts.infradead.org, maxime.coquelin@...com
Subject: Re: [RFC PATCH] ARM: Add imprecise abort enable/disable macro

On Mon, Feb 10, 2014 at 03:12:47PM +0000, Dave Martin wrote:
> Firstly, blindly adding 4 to PC is obviouly not right, partly because we
> might be running an unrelated thread by the time the abort fires, and
> also because the affected instruction might not be 4 bytes in size in a
> Thumb kernel.

Exactly.  We ended up on some platforms having special accessors for PCI
where we included a number of 'mov r0, r0' instructions after the accessor
so we could properly cope with them - but this required knowledge that
we were going to only receive an imprecise abort from these accessors
and only for a few cycles after the instruction.

However, that's not true with modern architectures.  The point they're
received will _not_ be the load/store which resulted in the abort, and
in the case of a write, they could be many hundreds of cycles later,
especially if the write has been buffered.

So adding four to the PC is definitely a very /bad/ thing to do.

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Estimate before purchase was "up to 13.2Mbit".
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