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Message-ID: <20140210162822.GF2794@e103592.cambridge.arm.com>
Date: Mon, 10 Feb 2014 16:28:22 +0000
From: Dave Martin <Dave.Martin@....com>
To: Russell King - ARM Linux <linux@....linux.org.uk>
Cc: Jonathan Austin <Jonathan.Austin@....com>,
"nico@...aro.org" <nico@...aro.org>,
Marc Zyngier <Marc.Zyngier@....com>,
Catalin Marinas <Catalin.Marinas@....com>,
"u.kleine-koenig@...gutronix.de" <u.kleine-koenig@...gutronix.de>,
"sboyd@...eaurora.org" <sboyd@...eaurora.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Will Deacon <will.deacon@....com>,
"ben.dooks@...ethink.co.uk" <ben.dooks@...ethink.co.uk>,
"vgupta@...opsys.com" <vgupta@...opsys.com>,
Fabrice Gasnier <fabrice.gasnier@...com>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"maxime.coquelin@...com" <maxime.coquelin@...com>
Subject: Re: [RFC PATCH] ARM: Add imprecise abort enable/disable macro
On Mon, Feb 10, 2014 at 03:19:34PM +0000, Russell King - ARM Linux wrote:
> On Mon, Feb 10, 2014 at 02:42:28PM +0000, Dave Martin wrote:
> > Should we require CPSR.A to me masked in Booting, for all CPUs that have
> > it?
>
> If it's not masked at boot, then there can't be an imprecise exception
> pending.
Couldn't there still be a dangling abort condition triggered by the
bootloader, which which doesn't raise the abort pin until after we
entered the kernel?
> That's unlike interrupts, where a device could trigger an interrupt at
> any moment (eg, a timer expiring.)
List as with interrupts, there's no way to drain or cancel pending aborts
that aren't asserted yet, but whose cause conditions are already
established.
It's possible that Strongly-Ordered memory is sufficient to
guarantee that any D-side abort becomes synchronous in some
implementations but I don't think the arhitecture guarantees it.
It certainly won't be guaranteed for any other memory type.
For these reasons, imprecise aborts seem a lot like interrupts:
you can mask them or handle them; but controlling when and whether
they occur involves platform-specific assumptions, at least in
theory.
Cheers
---Dave
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