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Message-ID: <20140211203413.GB9987@twins.programming.kicks-ass.net>
Date:	Tue, 11 Feb 2014 21:34:13 +0100
From:	Peter Zijlstra <peterz@...radead.org>
To:	Stephane Eranian <eranian@...gle.com>
Cc:	LKML <linux-kernel@...r.kernel.org>,
	"mingo@...e.hu" <mingo@...e.hu>,
	Arnaldo Carvalho de Melo <acme@...hat.com>,
	"ak@...ux.intel.com" <ak@...ux.intel.com>,
	"Yan, Zheng" <zheng.z.yan@...el.com>
Subject: Re: [PATCH v2 6/8] perf/x86/uncore: add SNB/IVB/HSW client uncore
 memory controller support

On Tue, Feb 11, 2014 at 07:31:59PM +0100, Stephane Eranian wrote:
> > Anyway, perf_event_intel.c lists: 60,63,69,70,71 as being haswell
> > clients.  Andi did all that, so if its wrong its on Intel anyway.
> >
> What he has is okay for core. They all have the same core PMU at 99%.
> But the uncore can be radically different. Look at IVB (58) vs IVB-EP (62).
> So this is more risky there. That is why I did not add the other model numbers.

Well, if any of those is a !client part; then still his fault for not
putting in a comment.

What's the worst that can happen? Failing to find the hardware I suppose
seeing as this is all discoverable PCI space?
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