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Message-ID: <532C8E1F.8080400@linutronix.de>
Date:	Fri, 21 Mar 2014 20:08:15 +0100
From:	Sebastian Andrzej Siewior <bigeasy@...utronix.de>
To:	delicious quinoa <delicious.quinoa@...il.com>
CC:	Alan Tull <atull@...era.com>,
	Linus Walleij <linus.walleij@...aro.org>,
	Alexandre Courbot <gnurou@...il.com>,
	"linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
	linux-kernel <linux-kernel@...r.kernel.org>,
	Dinh Nguyen <dinguyen@...era.com>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>
Subject: Re: [PATCH 3/3] ARM: dts: socfpga: add gpio pieces

On 03/21/2014 07:14 PM, delicious quinoa wrote:
>> +               gpio@...08000 {
>> +                       #address-cells = <1>;
>> +                       #size-cells = <0>;
>> +                       compatible = "snps,dw-apb-gpio";
>> +                       reg = <0xff708000 0x1000>;
>> +                       clocks = <&per_base_clk>;
>> +                       status = "disabled";
>> +
>> +                       gpio0: gpio-controller@0 {
>> +                               compatible = "snps,dw-apb-gpio-port";
>> +                               gpio-controller;
>> +                               #gpio-cells = <1>;
> 
> #gpio-cells = <2>;
> 
> I applied this patch, fixed the gpio-cells, tested on a cyclone5 soc
> devkit, and see that it breaks the interrupts.  Did you test this?

No, as I said. in 0/3. Will take a look on that at somepoint next week.

> 
> Alan

Sebastian
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