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Message-ID: <1395842272-15267-11-git-send-email-kishon@ti.com>
Date: Wed, 26 Mar 2014 19:27:50 +0530
From: Kishon Vijay Abraham I <kishon@...com>
To: <devicetree@...r.kernel.org>, <linux-doc@...r.kernel.org>,
<linux-kernel@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-omap@...r.kernel.org>, <linux-pci@...r.kernel.org>,
<bhelgaas@...gle.com>, <mohit.kumar@...com>, <jg1.han@...sung.com>
CC: <robh+dt@...nel.org>, <pawel.moll@....com>, <mark.rutland@....com>,
<ijc+devicetree@...lion.org.uk>, <galak@...eaurora.org>,
<rob@...dley.net>, <linux@....linux.org.uk>, <tony@...mide.com>,
<rnayak@...com>, <paul@...an.com>, <kishon@...com>
Subject: [RFC PATCH 10/12] ARM: dts: dra7: Add dt data for PCIe PHY
Added dt data for PCIe PHY as a child node of ocp2scp3.
The documention for this node can be found @ ../bindings/phy/ti-phy.txt.
Signed-off-by: Kishon Vijay Abraham I <kishon@...com>
---
arch/arm/boot/dts/dra7.dtsi | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 73c61d0..7ac372b 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -683,6 +683,22 @@
clock-names = "sysclk";
#phy-cells = <0>;
};
+
+ pcie1_phy: pciephy@...94000 {
+ compatible = "ti,phy-pipe3-pcie";
+ ctrl-module = <&omap_control_pcie1phy>;
+ clocks = <&dpll_pcie_ref_ck>,
+ <&dpll_pcie_ref_m2ldo_ck>,
+ <&optfclk_pciephy_32khz>,
+ <&optfclk_pciephy_clk>,
+ <&optfclk_pciephy_div_clk>,
+ <&optfclk_pciephy_div>;
+ clock-names = "dpll_ref", "dpll_ref_m2",
+ "wkupclk", "refclk",
+ "div-clk", "phy-div";
+ #phy-cells = <0>;
+ ti,hwmods = "pcie1-phy";
+ };
};
sata: sata@...41100 {
--
1.7.9.5
--
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