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Date:	Tue, 01 Apr 2014 15:26:57 +0200
From:	Michal Simek <monstr@...str.eu>
To:	Tim Sander <tim@...eglstein.org>
CC:	"linux-arm@...ts.infradead.org" <linux-arm@...ts.infradead.org>,
	linux-kernel@...r.kernel.org,
	Michal Simek <michal.simek@...inx.com>,
	Russell King <linux@....linux.org.uk>,
	Thomas Gleixner <tglx@...utronix.de>
Subject: Re: FIQ on xilinx cortex a9 zynq

Hi Tim,

On 02/28/2014 05:53 PM, Tim Sander wrote:
> Hi
> 
> I am currently trying to get the FIQ interrupt working with linux. I want to
> have the FIQ to have an interrupt which is not masked by linux and gives the
> lowest irq latencys the hardware can deliver. 
> 
> In the case of the xilinx zynx i have seen that the ICCICR register enables
> the FIQ via the fittingly named config bit FiqEn. Enabling this bit "as is" does
> not seem to work as the kernel works in secure mode and thus all interrupts
> delivered suddenly are delivered in FIQ context which is obviously not a good
> idea.

yes. I don't know why but Linux on Zynq in secure mode.
As I mentioned in u-boot thread there is secure monitor available
here https://github.com/serngawy/OpenVirtualization
where Linux is switched to non-secure mode.
Unfortunately this secure monitor is not done in nice way
but at least it proved that Linux can run in non secure mode.

Regarding GIC setup here should be experts to tell you how to do it.
If you need some help to get Linux running on Zynq in non secure mode
please ping me we can look at it. I tried it some months ago.

Thanks,
Michal

-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform



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