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Date:	Fri, 4 Apr 2014 00:15:17 +0530
From:	Harini Katakam <harinikatakamlinux@...il.com>
To:	Sören Brinkmann <soren.brinkmann@...inx.com>
Cc:	Punnaiah Choudary Kalluri <punnaiah.choudary.kalluri@...inx.com>,
	broonie@...nel.org, Grant Likely <grant.likely@...aro.org>,
	Rob Herring <robh+dt@...nel.org>,
	Pawel Moll <pawel.moll@....com>,
	Mark Rutland <mark.rutland@....com>,
	"ijc+devicetree@...lion.org.uk" <ijc+devicetree@...lion.org.uk>,
	Kumar Gala <galak@...eaurora.org>, linux-spi@...r.kernel.org,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"linux-doc@...r.kernel.org" <linux-doc@...r.kernel.org>,
	Michal Simek <michal.simek@...inx.com>,
	Punnaiah Choudary <kpc528@...il.com>,
	kalluripunnaiahchoudary@...il.com,
	Punnaiah Choudary Kalluri <punnaia@...inx.com>,
	Harini Katakam <harinik@...inx.com>
Subject: Re: [PATCH 1/2] devicetree: Add devicetree bindings documentation for
 Zynq Quad SPI

Hi Soren

On Thu, Apr 3, 2014 at 11:20 PM, Sören Brinkmann
<soren.brinkmann@...inx.com> wrote:
> Hi Punnaiah,
>
> On Thu, 2014-04-03 at 10:33PM +0530, Punnaiah Choudary Kalluri wrote:
>> Add bindings documentation for Zynq Quad SPI driver.
>>
>> Signed-off-by: Punnaiah Choudary Kalluri <punnaia@...inx.com>
>> ---
>>  .../devicetree/bindings/spi/spi-zynq-qspi.txt      |   26 ++++++++++++++++++++
>>  1 file changed, 26 insertions(+)
>>  create mode 100644 Documentation/devicetree/bindings/spi/spi-zynq-qspi.txt
>>
>> diff --git a/Documentation/devicetree/bindings/spi/spi-zynq-qspi.txt b/Documentation/devicetree/bindings/spi/spi-zynq-qspi.txt
>> new file mode 100644
>> index 0000000..88e00f8
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/spi/spi-zynq-qspi.txt
>> @@ -0,0 +1,26 @@
>> +Xilinx Zynq QSPI controller Device Tree Bindings
>> +-------------------------------------------------
>> +
>> +Required properties:
>> +- compatible         : Should be "xlnx,zynq-qspi-1.0".
>> +- reg                        : Physical base address and size of QSPI registers map.
>> +- interrupts         : Property with a value describing the interrupt
>> +                       number.
>> +- interrupt-parent   : Must be core interrupt controller
>> +- clock-names                : List of input clock names - "ref_clk", "aper_clk"
>> +                       (See clock bindings for details).
>> +- clocks             : Clock phandles (see clock bindings for details).
>> +
>> +Optional properties:
>> +- num-cs             : Number of chip selects used.
>> +
>> +Example:
>> +     qspi@...0d000 {
>> +             compatible = "xlnx,zynq-qspi-1.0";
>> +             clock-names = "ref_clk", "aper_clk";
>
> These seem to be the SOC names of the clocks. Doesn't have the IP its
> own naming for these clock inputs?
>

The IP design spec uses the name ref_clk.
There is no particular clock name used for for APB clock.
So I think aper_clk is a valid name to use.

Regards,
Harini
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