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Date:	Mon, 7 Apr 2014 16:00:43 +0800
From:	Tien Hock Loh <thloh@...era.com>
To:	Tien Hock Loh <thloh@...era.com>
Cc:	Josh Cartwright <joshc@...eaurora.org>, robh+dt@...nel.org,
	pawel.moll@....com, Mark Rutland <mark.rutland@....com>,
	ijc+devicetree@...lion.org.uk, Kumar Gala <galak@...eaurora.org>,
	Rob Landley <rob@...dley.net>,
	Linus Walleij <linus.walleij@...aro.org>,
	Alexandre Courbot <gnurou@...il.com>,
	Grant Likely <grant.likely@...aro.org>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"linux-doc@...r.kernel.org" <linux-doc@...r.kernel.org>,
	linux-kernel@...r.kernel.org, linux-gpio@...r.kernel.org,
	dinguyen@...era.com, "lftan@...era.com" <lftan@...era.com>
Subject: Re: [PATCH V7 1/1] drivers/gpio: Altera soft IP GPIO driver and
 devicetree binding

On Wed, Mar 19, 2014 at 6:09 PM, Tien Hock Loh <thloh@...era.com> wrote:
> On Fri, Mar 7, 2014 at 11:14 PM, Josh Cartwright <joshc@...eaurora.org> wrote:
>> On Mon, Mar 03, 2014 at 06:27:43PM +0800, thloh@...era.com wrote:
>>> From: Tien Hock Loh <thloh@...era.com>
>>>
>>> Add driver support for Altera GPIO soft IP, including interrupts and I/O.
>>> Tested on Altera CV SoC board using dipsw and LED using LED framework.
>>>
>>> Signed-off-by: Tien Hock Loh <thloh@...era.com>
>>> ---
>>
>>> +             return -ENOMEM;
>>> +     }
>>> +     altera_gc->domain = 0;
>>> +
>>> +     spin_lock_init(&altera_gc->gpio_lock);
>>> +
>>> +     id = pdev->id;
>>> +
>>> +     if (of_property_read_u32(node, "altr,gpio-bank-width", &reg))
>>> +             /*By default assume full GPIO controller*/
>>> +             altera_gc->mmchip.gc.ngpio = 32;
>>> +     else
>>> +             altera_gc->mmchip.gc.ngpio = reg;
>>> +
>>> +     if (altera_gc->mmchip.gc.ngpio > 32) {
>>> +             dev_warn(&pdev->dev,
>>> +                     "ngpio is greater than 32, defaulting to 32\n");
>>> +             altera_gc->mmchip.gc.ngpio = 32;
>>> +     }
>>> +
>>> +     altera_gc->mmchip.gc.direction_input    = altera_gpio_direction_input;
>>> +     altera_gc->mmchip.gc.direction_output   = altera_gpio_direction_output;
>>> +     altera_gc->mmchip.gc.get                = altera_gpio_get;
>>> +     altera_gc->mmchip.gc.set                = altera_gpio_set;
>>> +     altera_gc->mmchip.gc.to_irq             = altera_gpio_to_irq;
>>> +     altera_gc->mmchip.gc.owner              = THIS_MODULE;
>>> +
>>> +     ret = of_mm_gpiochip_add(node, &altera_gc->mmchip);
>>> +     if (ret) {
>>> +             dev_err(&pdev->dev, "Failed adding memory mapped gpiochip\n");
>>> +             return ret;
>>> +     }
>>> +
>>> +     platform_set_drvdata(pdev, altera_gc);
>>> +
>>> +     altera_gc->mapped_irq = irq_of_parse_and_map(node, 0);
>>>
>>
>> platform_get_irq(pdev, 0);
>>
> OK.
>

platform_get_irq doesn't create the irq mapping which is needed by the
driver. Since this driver is targeted at using of, should I be using
irq_of_parse_and_map or should I still redo the codes with
platform_get_irq and irq_create_mapping? I think the latter would be
introducing code redundancy. Please advice.

Thanks.
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