linux-kernel - Re: [RFC PATCH 4/6] uprobes/x86: Emulate rip-relative call's

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Message-ID: <5346AB07.4090909@redhat.com>
Date:	Thu, 10 Apr 2014 16:30:31 +0200
From:	Denys Vlasenko <dvlasenk@...hat.com>
To:	Oleg Nesterov <oleg@...hat.com>
CC:	Jim Keniston <jkenisto@...ux.vnet.ibm.com>,
	Ingo Molnar <mingo@...e.hu>,
	Srikar Dronamraju <srikar@...ux.vnet.ibm.com>,
	Ananth N Mavinakayanahalli <ananth@...ibm.com>,
	Anton Arapov <aarapov@...hat.com>,
	David Long <dave.long@...aro.org>,
	"Frank Ch. Eigler" <fche@...hat.com>,
	Jonathan Lebon <jlebon@...hat.com>,
	Masami Hiramatsu <masami.hiramatsu.pt@...achi.com>,
	linux-kernel@...r.kernel.org
Subject: Re: [RFC PATCH 4/6] uprobes/x86: Emulate rip-relative call's

On 04/10/2014 04:18 PM, Oleg Nesterov wrote:
> On 04/10, Denys Vlasenko wrote:
>>
>> There is this monstrosity, "16-bit override for branches" in 64-mode:
>>
>> 66 e8 nn nn       callw   <offset16>
>>
>> Nobody sane uses it because it truncates instruction pointer.
>>
>> Or rather, *I think* it should truncate it (i.e. zero-extend to full width),
>> but conceivably some CPUs can be buggy wrt that:
>> they can decide to modify only lower 16 bits of IP,
>> or even they can decided to use signed <offset16> but apply it
>> to full-width RIP.
>>
>> AMD manuals are not clear on what exactly should happen.
>>
>> I am sure no one sane uses this form of branch instructions
>> in 32-bit and 64-bit code.
>>
>> I don't think we should be trying to support it "correctly"
>> (we can just let program crash with SIGILL or something),
>> we only need to make sure we don't overlook its existence
>> and thus are not tricked into touching or modifying unrelated data.
> 
> And after the quick check it seems that lib/insn.c doesn't parse
> "66 e8 nn nn" correctly. It treats the next 2 bytes as the part
> of 32bit offset.

I didn't run-test it yet. By code inspection, it seems to work...

x86-opcode-map.txt:
    e8: CALL Jz (f64)

gen-insn-attr-x86.awk:
    imm_flag["Jz"] = "INAT_MAKE_IMM(INAT_IMM_VWORD32)"


insn.c:
        case INAT_IMM_VWORD32:
                if (!__get_immv32(insn))
                        goto err_out;
...
static int __get_immv32(struct insn *insn)
{
        switch (insn->opnd_bytes) {
        case 2:
                insn->immediate.value = get_next(short, insn);
                insn->immediate.nbytes = 2;
                break;
        case 4:
        case 8:
                insn->immediate.value = get_next(int, insn);
                insn->immediate.nbytes = 4;
                break;


...until I notice this code:

void insn_get_modrm(struct insn *insn)
{
...
        if (insn->x86_64 && inat_is_force64(insn->attr))
                insn->opnd_bytes = 8;


The (f64) modifier in x86-opcode-map.txt means that inat_is_force64()
is true for call opcode. So we won't reach "case 2:" in __get_immv32():
insn_get_prefixes() did set insn->opnd_bytes to 2 when it saw 0x66 prefix,
but it was before we reach this place, and here we overrode it.
This is a bug in insn decoder.

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