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Date:	Sat, 12 Apr 2014 17:03:24 -0700
From:	"H. Peter Anvin" <hpa@...or.com>
To:	Alexander van Heukelum <heukelum@...tmail.fm>,
	Andy Lutomirski <luto@...capital.net>,
	Brian Gerst <brgerst@...il.com>,
	Ingo Molnar <mingo@...nel.org>,
	Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
	Linus Torvalds <torvalds@...ux-foundation.org>,
	Thomas Gleixner <tglx@...utronix.de>, stable@...per.es
Subject: Re: [tip:x86/urgent] x86-64, modify_ldt: Ban 16-bit segments on 64-bit
 kernels

On 04/12/2014 04:49 PM, Alexander van Heukelum wrote:
> On Sun, Apr 13, 2014, at 1:31, H. Peter Anvin wrote:
>>>>> d. Trampoline in user space
>>>>>
>>>>> A return to the vdso with values set up in registers r8-r15 would enable
>>>>> a trampoline in user space.  Unfortunately there is no way
>>>>> to do a far JMP entirely with register state so this would require
>>>>> touching user space memory, possibly in an unsafe manner.
>>>
>>> d.2. trampoline in user space via long mode
>>>
>>> Return from the kernel to a user space trampoline via long mode.
>>> The kernel changes the stack frame just before executing the iret
>>> instruction. (the CS and RIP slots are set to run the trampoline code,
>>> where CS is a long mode segment.) The trampoline code in userspace
>>> is set up to this single instruction: a far jump to the final CS:EIP
>>> (compatibility mode).
>>
>> This still requires user space memory that the kernel can write to.
>> Long mode is actually exactly identical to what I was suggesting above,
>> except that I would avoid using self-modifying code in favor of just
>> parameterization using the high registers.
> 
> No self modifying code... The far jump must be in the indirect form
> anyhow. The CS:EIP must be accessible from user mode, but not
> necessarily from compatibility mode. So the trampoline (the jump)
> and data (CS:EIP) can live pretty much anywhere in virtual memory.
> But indeed, I see what you meant now.
> 

This is, in fact, exactly then what I was suggesting, except that data
is passed directly in memory rather than in a register and letting user
space sort it out (this could be in the vdso, but the vdso may be > 4 GB
so it has to be in 64-bit mode until the last instruction.)  The
difference isn't huge; mostly an implementation detail.

A signal arriving while in the user space trampoline could seriously
complicate life.

	-hpa

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