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Message-ID: <20140416101323.GP12304@sirena.org.uk>
Date: Wed, 16 Apr 2014 11:13:23 +0100
From: Mark Brown <broonie@...nel.org>
To: Lee Jones <lee.jones@...aro.org>
Cc: Doug Anderson <dianders@...omium.org>,
Anton Vorontsov <anton@...msg.org>,
Olof Johansson <olof@...om.net>,
Sachin Kamat <sachin.kamat@...aro.org>,
ajaykumar.rs@...sung.com, linux-samsung-soc@...r.kernel.org,
Samuel Ortiz <sameo@...ux.intel.com>,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/3] mfd: tps65090: Stop caching registers
On Wed, Apr 16, 2014 at 10:59:22AM +0100, Lee Jones wrote:
> > NOTE: the IRQnMASK and CG_CTRLn registers are the exception and could
> > be cached. If we find that we spend a lot of time reading those we
> > can turn on cache for just those registers.
> > -static bool is_volatile_reg(struct device *dev, unsigned int reg)
> > -{
> > - if ((reg == TPS65090_INT_STS) || (reg == TPS65090_INT_STS2))
> > - return true;
> > - else
> > - return false;
> > -}
> > -
> I don't know enough about Regmap internals to know what this actually
> affects in real terms.
> Mark,
> Does this change seem sane to you?
It does what it says, it stops us caching stuff. It would seem better
to do what the changelog suggests above and keep caching the registers
that can be cached - especially the interrupt masks, they should get
read in the interrupt path and that tends to be a bit latency sensitive.
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