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Message-ID: <CAL1qeaG+MBmBZ3dD6LZwV5mh5A=u+0N7Obt43UwhViaBYpXxpw@mail.gmail.com>
Date: Thu, 17 Apr 2014 09:43:59 -0700
From: Andrew Bresticker <abrestic@...omium.org>
To: Laxman Dewangan <ldewangan@...dia.com>
Cc: Linus Walleij <linus.walleij@...aro.org>,
Stephen Warren <swarren@...dotorg.org>,
"linux-tegra@...r.kernel.org" <linux-tegra@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] pinctrl: as3722: fix handling of GPIO invert bit
On Thu, Apr 17, 2014 at 2:48 AM, Laxman Dewangan <ldewangan@...dia.com> wrote:
> Hi Andrew,
>
>
> On Wednesday 16 April 2014 06:55 AM, Andrew Bresticker wrote:
>>
>> diff --git a/drivers/pinctrl/pinctrl-as3722.c
>> b/drivers/pinctrl/pinctrl-as3722.c
>> index 92ed4b2..c862f9c0 100644
>> --- a/drivers/pinctrl/pinctrl-as3722.c
>> +++ b/drivers/pinctrl/pinctrl-as3722.c
>> @@ -64,7 +64,6 @@ struct as3722_pin_function {
>> };
>> struct as3722_gpio_pin_control {
>> - bool enable_gpio_invert;
>> unsigned mode_prop;
>> int io_function;
>> };
>
>
> Instead of removing this flag and calling read of register on every gpio
> set, better if we update this flag on probe once and use this for entire
> life.
Because of regcache, the reads won't result in any additional I2C
transfers. I can respin though if you want.
-Andrew
>
> So adding the code in probe() as
>
> for (i = 0; i < ARRAY_SIZE(as3722_pingroups); ++i) {
> int gpio_cntr_reg = AS3722_GPIOn_CONTROL_REG(i);
> u32 val;
>
> ret = as3722_read(as3722, gpio_cntr_reg, &val);
> if (!ret)
> as_pci->gpio_control[i].enable_gpio_invert =
> !!(val & AS3722_GPIO_INV);
> }
>
>
> Thanks,
> Laxman
--
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