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Message-ID: <53500E3D.4040709@nvidia.com>
Date: Thu, 17 Apr 2014 22:54:13 +0530
From: Laxman Dewangan <ldewangan@...dia.com>
To: Andrew Bresticker <abrestic@...omium.org>
CC: Linus Walleij <linus.walleij@...aro.org>,
Stephen Warren <swarren@...dotorg.org>,
"linux-tegra@...r.kernel.org" <linux-tegra@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] pinctrl: as3722: fix handling of GPIO invert bit
On Thursday 17 April 2014 10:13 PM, Andrew Bresticker wrote:
> On Thu, Apr 17, 2014 at 2:48 AM, Laxman Dewangan <ldewangan@...dia.com> wrote:
>> Hi Andrew,
>>
>>
>> On Wednesday 16 April 2014 06:55 AM, Andrew Bresticker wrote:
>>> diff --git a/drivers/pinctrl/pinctrl-as3722.c
>>> b/drivers/pinctrl/pinctrl-as3722.c
>>> index 92ed4b2..c862f9c0 100644
>>> --- a/drivers/pinctrl/pinctrl-as3722.c
>>> +++ b/drivers/pinctrl/pinctrl-as3722.c
>>> @@ -64,7 +64,6 @@ struct as3722_pin_function {
>>> };
>>> struct as3722_gpio_pin_control {
>>> - bool enable_gpio_invert;
>>> unsigned mode_prop;
>>> int io_function;
>>> };
>>
>> Instead of removing this flag and calling read of register on every gpio
>> set, better if we update this flag on probe once and use this for entire
>> life.
> Because of regcache, the reads won't result in any additional I2C
> transfers. I can respin though if you want.
Yaah, if regcache is enabled on this then it will reduce i2c calls.
Just wanted to keep this invert bit so in future, if we need it, we can
make it configurable. But not much issue here.
I am acking it
Acked-by: Laxman Dewangan <ldewangan@...dia.com>
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