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Message-ID: <tip-ffde1de64012c406dfdda8690918248b472f24e4@git.kernel.org>
Date:	Thu, 17 Apr 2014 14:39:56 -0700
From:	tip-bot for Thomas Gleixner <tipbot@...or.com>
To:	linux-tip-commits@...r.kernel.org
Cc:	linux-kernel@...r.kernel.org, hpa@...or.com, mingo@...nel.org,
	k.kozlowski@...sung.com, kgene.kim@...sung.com,
	kyungmin.park@...sung.com, b.zolnierkie@...sung.com,
	m.szyprowski@...sung.com, tglx@...utronix.de
Subject: [tip:irq/urgent] irqchip: Gic: Support forced affinity setting

Commit-ID:  ffde1de64012c406dfdda8690918248b472f24e4
Gitweb:     http://git.kernel.org/tip/ffde1de64012c406dfdda8690918248b472f24e4
Author:     Thomas Gleixner <tglx@...utronix.de>
AuthorDate: Wed, 16 Apr 2014 14:36:44 +0000
Committer:  Thomas Gleixner <tglx@...utronix.de>
CommitDate: Thu, 17 Apr 2014 23:36:28 +0200

irqchip: Gic: Support forced affinity setting

To support the affinity setting of per cpu timers in the early startup
of a not yet online cpu, implement the force logic, which disables the
cpu online check.

Tagged for stable to allow a simple fix of the affected SoC clock
event drivers.

Signed-off-by: Thomas Gleixner <tglx@...utronix.de>
Tested-by: Krzysztof Kozlowski <k.kozlowski@...sung.com>
Cc: Kyungmin Park <kyungmin.park@...sung.com>
Cc: Marek Szyprowski <m.szyprowski@...sung.com>
Cc: Bartlomiej Zolnierkiewicz <b.zolnierkie@...sung.com>
Cc: Tomasz Figa <t.figa@...sung.com>,
Cc: Daniel Lezcano <daniel.lezcano@...aro.org>,
Cc: Kukjin Kim <kgene.kim@...sung.com>
Cc: linux-arm-kernel@...ts.infradead.org,
Cc: stable@...r.kernel.org
Link: http://lkml.kernel.org/r/20140416143315.916984416@linutronix.de
Signed-off-by: Thomas Gleixner <tglx@...utronix.de>
---
 drivers/irqchip/irq-gic.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
index 4300b66..57d165e 100644
--- a/drivers/irqchip/irq-gic.c
+++ b/drivers/irqchip/irq-gic.c
@@ -246,10 +246,14 @@ static int gic_set_affinity(struct irq_data *d, const struct cpumask *mask_val,
 			    bool force)
 {
 	void __iomem *reg = gic_dist_base(d) + GIC_DIST_TARGET + (gic_irq(d) & ~3);
-	unsigned int shift = (gic_irq(d) % 4) * 8;
-	unsigned int cpu = cpumask_any_and(mask_val, cpu_online_mask);
+	unsigned int cpu, shift = (gic_irq(d) % 4) * 8;
 	u32 val, mask, bit;
 
+	if (!force)
+		cpu = cpumask_any_and(mask_val, cpu_online_mask);
+	else
+		cpu = cpumask_first(mask_val);
+
 	if (cpu >= NR_GIC_CPU_IF || cpu >= nr_cpu_ids)
 		return -EINVAL;
 
--
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