[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <1398116021.12716.1.camel@dinh-ubuntu>
Date: Mon, 21 Apr 2014 16:33:41 -0500
From: Thor Thayer <tthayer@...era.com>
To: Pavel Machek <pavel@....cz>
CC: <robherring2@...il.com>, <pawel.moll@....com>,
<mark.rutland@....com>, <ijc+devicetree@...lion.org>,
<galak@...eaurora.org>, <rob@...dley.net>,
<linux@....linux.org.uk>, <dinguyen@...era.com>,
<dougthompson@...ssion.com>, <grant.likely@...aro.org>,
<tthayer.linux@...il.com>, Borislav Petkov <bp@...en8.de>,
<devicetree@...r.kernel.org>, <linux-edac@...r.kernel.org>,
<linux-kernel@...r.kernel.org>
Subject: Re: [PATCHv2 3/3] edac: altera: Add SDRAM EDAC support for
CycloneV/ArriaV
On Mon, 2014-04-21 at 12:27 +0200, Pavel Machek wrote:
> Hi!
>
> > From: Thor Thayer <tthayer@...era.com>
> >
> > Added EDAC support for reporting ECC errors of CycloneV
> > and ArriaV SDRAM controller.
> > - The SDRAM Controller registers are used by the FPGA bridge so
> > these are accessed through the syscon interface.
> > - The configuration of the SDRAM memory size for the EDAC framework
> > is discovered from the SDRAM Controller registers.
> > - Documentation of the bindings in devicetree/bindings/arm/altera/
> > socfpga-sdram-edac.txt
> > - Correction of single bit errors, detection of double bit errors.
> >
> > ---
> > v2: Use the SDRAM controller registers to calculate memory size
> > instead of the Device Tree. Update To & Cc list. Add maintainer
> > information.
>
> I'd reduce number of *s in the messages, otherwise
>
> Reviewed-by: Pavel Machek <pavel@....cz>
>
> for whole series.
> Pavel
>
Hi Pavel.
Noted - I will make the change. Thank you for reviewing.
Thor
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Powered by blists - more mailing lists