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Message-ID: <CACRpkdb--trcCguVGoh-uOvKju+1qbKdG2vE0eAOrwR+jZJ0rA@mail.gmail.com>
Date: Tue, 13 May 2014 10:29:35 +0200
From: Linus Walleij <linus.walleij@...aro.org>
To: Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
Cc: Russell King <linux@....linux.org.uk>,
"linux-mmc@...r.kernel.org" <linux-mmc@...r.kernel.org>,
Chris Ball <chris@...ntf.net>,
Ulf Hansson <ulf.hansson@...aro.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
agross@...cinc.com,
"linux-arm-msm@...r.kernel.org" <linux-arm-msm@...r.kernel.org>
Subject: Re: [PATCH v1 10/11] mmc: mmci: Add Qcom variations to MCICommand register.
On Tue, Apr 29, 2014 at 10:21 AM, <srinivas.kandagatla@...aro.org> wrote:
> From: Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
>
> Some bits which control Command Path State Machine (CPSM) are new in Qcom
> integration, so this patch adds support to those bits.
>
> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
(...)
> + if (host->hw_designer == AMBA_VENDOR_QCOM &&
> + mmc_cmd_type(cmd) == MMC_CMD_ADTC)
> + c |= MCI_CSPM_QCOM_DATCMD;
> +
You know the drill. Use vendor data.
> +/* Modified on Qualcomm Integrations */
> +#define MCI_CSPM_QCOM_DATCMD (1 << 12)
> +#define MCI_CSPM_QCOM_MCIABORT (1 << 13)
> +#define MCI_CSPM_QCOM_CCSENABLE (1 << 14)
> +#define MCI_CSPM_QCOM_CCSDISABLE (1 << 15)
> +#define MCI_CSPM_QCOM_AUTO_CMD19 (1 << 16)
> +#define MCI_CSPM_QCOM_AUTO_CMD21 (1 << 21)
You know how to rename these defines too :-)
Yours,
Linus Walleij
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