linux-kernel - RE: [RFC PATCH] pcie-designware: DT documentation update to clarify DT properties

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Date:	Wed, 21 May 2014 22:54:21 +0000
From:	"Karicheri, Muralidharan" <m-karicheri2@...com>
To:	"Karicheri, Muralidharan" <m-karicheri2@...com>,
	"jg1.han@...sung.com" <jg1.han@...sung.com>,
	"xobs@...agi.com" <xobs@...agi.com>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"linux-doc@...r.kernel.org" <linux-doc@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"arnd@...db.de" <arnd@...db.de>,
	"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>
CC:	Mohit Kumar <mohit.kumar@...com>,
	Pratyush Anand <pratyush.anand@...com>,
	Richard Zhu <r65037@...escale.com>,
	"ABRAHAM, KISHON VIJAY" <kishon@...com>,
	Marek Vasut <marex@...x.de>
Subject: RE: [RFC PATCH] pcie-designware: DT documentation update to clarify
 DT properties

>-----Original Message-----
>From: Karicheri, Muralidharan
>Sent: Wednesday, May 21, 2014 6:52 PM
>To: jg1.han@...sung.com; xobs@...agi.com; devicetree@...r.kernel.org; linux-
>doc@...r.kernel.org; linux-kernel@...r.kernel.org; arnd@...db.de
>Cc: Karicheri, Muralidharan; Mohit Kumar; Pratyush Anand; Richard Zhu; ABRAHAM,
>KISHON VIJAY; Marek Vasut
>Subject: [RFC PATCH] pcie-designware: DT documentation update to clarify DT properties
>
>Current documentation is not clear enough about the mandatory bindings to be present in
>the device node of a snps,dw-pcie compatible pcie controller. In some cases the property is
>not present in all drivers.
>For example pcie_bus is specified as a clock, but only one of the driver uses it. This patch
>attempts to make the documentation consistent with current implementation so that it is
>clear enough for anyone who develops a dw-pcie compatible pcie driver.
>
>CC: Mohit Kumar <mohit.kumar@...com>
>CC: Jingoo Han <jg1.han@...sung.com>
>CC: Pratyush Anand <pratyush.anand@...com>
>CC: Richard Zhu <r65037@...escale.com>
>CC: Kishon Vijay Abraham I <kishon@...com>
>CC: Marek Vasut <marex@...x.de>
>
>Signed-off-by: Murali Karicheri <m-karicheri2@...com>
>---
> .../devicetree/bindings/pci/designware-pcie.txt    |   10 ++++++----
> 1 file changed, 6 insertions(+), 4 deletions(-)
>
>diff --git a/Documentation/devicetree/bindings/pci/designware-pcie.txt
>b/Documentation/devicetree/bindings/pci/designware-pcie.txt
>index d6fae13..8b9dc52 100644
>--- a/Documentation/devicetree/bindings/pci/designware-pcie.txt
>+++ b/Documentation/devicetree/bindings/pci/designware-pcie.txt
>@@ -4,12 +4,14 @@ Required properties:
> - compatible: should contain "snps,dw-pcie" to identify the
> 	core, plus an identifier for the specific instance, such
> 	as "samsung,exynos5440-pcie" or "fsl,imx6q-pcie".
>-- reg: base addresses and lengths of the pcie controller,
>-	the phy controller, additional register for the phy controller.
>+- reg: base addresses and lengths of the pcie controller.
>+    index 0 - base address and length of RC's config space.
>+    index 1 and above: additional registers for the PCI controller
>+    that are specific to an implementation.
> - interrupts: interrupt values for level interrupt,
> 	pulse interrupt, special interrupt.
>-- clocks: from common clock binding: handle to pci clock.
>-- clock-names: from common clock binding: should be "pcie" and "pcie_bus".
>+- clocks: from common clock binding: handle to list of pci clock.
>+- clock-names: from common clock binding: pci clock names: "pcie"
> - #address-cells: set to <3>
> - #size-cells: set to <2>
> - device_type: set to "pci"
>--
>1.7.9.5

+ Adding to the pci list.
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