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Message-ID: <20140528195528.GQ29957@tassilo.jf.intel.com>
Date: Wed, 28 May 2014 12:55:28 -0700
From: Andi Kleen <ak@...ux.intel.com>
To: Stephane Eranian <eranian@...gle.com>
Cc: LKML <linux-kernel@...r.kernel.org>,
Peter Zijlstra <peterz@...radead.org>,
"mingo@...e.hu" <mingo@...e.hu>,
Dave Hansen <dave.hansen@...el.com>,
"Yan, Zheng" <zheng.z.yan@...el.com>
Subject: Re: [RFC] perf/x86: PMU IRQ handler issues
> Another explanation is that because we ACK the NMI early, we leave the
> door open to other interrupts, incl. NIC, and we are interrupting the execution
PMI executes with interrupts off.
> of the PMU IRQ handler, yet that detour is measured in the PMU handler
> latency, causing more throttling than needed. Is that a plausible scenario too?
> And if so, I think we need to narrow the window for timing errors, by
> acking late
> on all processors and not just HSW.
If you think there's a concrete problem please show an ftrace.
-Andi
--
ak@...ux.intel.com -- Speaking for myself only
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