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Message-ID: <CABPqkBRW8akWWrRgFwatHbui6+0JqXi=8T2N_JHZ_x4zLuq9EQ@mail.gmail.com>
Date:	Wed, 28 May 2014 21:56:35 +0200
From:	Stephane Eranian <eranian@...gle.com>
To:	Andi Kleen <ak@...ux.intel.com>
Cc:	LKML <linux-kernel@...r.kernel.org>,
	Peter Zijlstra <peterz@...radead.org>,
	"mingo@...e.hu" <mingo@...e.hu>,
	Dave Hansen <dave.hansen@...el.com>,
	"Yan, Zheng" <zheng.z.yan@...el.com>
Subject: Re: [RFC] perf/x86: PMU IRQ handler issues

On Wed, May 28, 2014 at 9:55 PM, Andi Kleen <ak@...ux.intel.com> wrote:
>
>> Another explanation is that because we ACK the NMI early, we leave the
>> door open to other interrupts, incl. NIC, and we are interrupting the execution
>
> PMI executes with interrupts off.
>
And that's coming from where?

>> of the PMU IRQ handler, yet that detour is measured in the PMU handler
>> latency, causing more throttling than needed. Is that a plausible scenario too?
>> And if so, I think we need to narrow the window for timing errors, by
>> acking late
>> on all processors and not just HSW.
>
> If you think there's a concrete problem please show an ftrace.
>
> -Andi
> --
> ak@...ux.intel.com -- Speaking for myself only
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