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Message-ID: <CACRpkdar8jUuQHg7q5rPmGQ2tdomBgXcPA5OUT-n3iLh5Ca11w@mail.gmail.com>
Date: Tue, 3 Jun 2014 10:10:13 +0200
From: Linus Walleij <linus.walleij@...aro.org>
To: Mika Westerberg <mika.westerberg@...ux.intel.com>
Cc: Grygorii Strashko <grygorii.strashko@...com>,
Alexandre Courbot <gnurou@...il.com>,
"Zhu, Lejun" <lejun.zhu@...ux.intel.com>,
Mathias Nyman <mathias.nyman@...ux.intel.com>,
"linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
jacob.jun.pan@...ux.intel.com, bin.yang@...el.com
Subject: Re: [PATCH v4] gpio: Add support for Intel SoC PMIC (Crystal Cove)
On Fri, May 30, 2014 at 10:25 AM, Mika Westerberg
<mika.westerberg@...ux.intel.com> wrote:
> I'm thinking that could we solve this so that we call
> acpi_gpiochip_request_interrupts() at the end of gpiochip_irqchip_add()
> and convert both pinctrl-baytrail and gpio-lynxpoint to use
> gpiochip_irqchip_add()?
Yes that seems like a great way to solve it actually.
Is someone able to do this refactoring?
I don't know if you have a case of an ACPI-based GPIO controller
that is *not* supplying interrupts? Because in that case this
would even be required for the thing to work, right?
Yours,
Linus Walleij
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