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Message-ID: <20140605213354.GD16855@tassilo.jf.intel.com>
Date:	Thu, 5 Jun 2014 14:33:54 -0700
From:	Andi Kleen <ak@...ux.intel.com>
To:	Peter Zijlstra <peterz@...radead.org>
Cc:	Stephane Eranian <eranian@...gle.com>,
	linux-kernel@...r.kernel.org, mingo@...e.hu, jolsa@...hat.com,
	zheng.z.yan@...el.com, maria.n.dimakopoulou@...il.com
Subject: Re: [PATCH 4/9] perf/x86: add cross-HT counter exclusion
 infrastructure

> This hard assumes theres only ever 2 threads, which is true and I
> suppose more in arch/x86 will come apart the moment Intel makes a chip
> with more, still, do we have topology_thread_id() or so to cure this?


Xeon Phi already has 4 threads today.

-Andi

-- 
ak@...ux.intel.com -- Speaking for myself only
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