linux-kernel - Re: [PATCH 4/9] perf/x86: add cross-HT counter exclusion infrastructure

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Message-ID: <CABPqkBTbt+ro+G0JLQEjLSubWZC7pz1X=qTQetK-i_KBp_D6Gg@mail.gmail.com>
Date:	Thu, 5 Jun 2014 23:38:26 +0200
From:	Stephane Eranian <eranian@...gle.com>
To:	Andi Kleen <ak@...ux.intel.com>
Cc:	Peter Zijlstra <peterz@...radead.org>,
	LKML <linux-kernel@...r.kernel.org>,
	"mingo@...e.hu" <mingo@...e.hu>, Jiri Olsa <jolsa@...hat.com>,
	"Yan, Zheng" <zheng.z.yan@...el.com>,
	Maria Dimakopoulou <maria.n.dimakopoulou@...il.com>
Subject: Re: [PATCH 4/9] perf/x86: add cross-HT counter exclusion infrastructure

On Thu, Jun 5, 2014 at 11:33 PM, Andi Kleen <ak@...ux.intel.com> wrote:
>> This hard assumes theres only ever 2 threads, which is true and I
>> suppose more in arch/x86 will come apart the moment Intel makes a chip
>> with more, still, do we have topology_thread_id() or so to cure this?
>
>
> Xeon Phi already has 4 threads today.
>
Yes, but it does not have that bug (hopefully). This code is just for
the impacted processors.

> -Andi
>
> --
> ak@...ux.intel.com -- Speaking for myself only
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