linux-kernel - Re: [PATCH] ARM: dts: berlin2q.dtsi: set L2CC tag and data latency as 2 cycles

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Message-ID: <20140612094423.GC23430@n2100.arm.linux.org.uk>
Date:	Thu, 12 Jun 2014 10:44:23 +0100
From:	Russell King - ARM Linux <linux@....linux.org.uk>
To:	Jisheng Zhang <jszhang@...vell.com>
Cc:	robh+dt@...nel.org, pawel.moll@....com, mark.rutland@....com,
	ijc+devicetree@...lion.org.uk, galak@...eaurora.org,
	sebastian.hesselbarth@...il.com,
	alexandre.belloni@...e-electrons.com,
	antoine.tenart@...e-electrons.com, devicetree@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] ARM: dts: berlin2q.dtsi: set L2CC tag and data latency
	as 2 cycles

On Thu, Jun 12, 2014 at 05:38:40PM +0800, Jisheng Zhang wrote:
> For all BG2Q SoCs, 2 cycles is the best/correct value

It would be a good idea to set all these parameters if you need to set
them at all - in other words, setting arm,dirty-latency as well, as
that's all part of the timing specification.

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